Analog and Digital Electronics 3

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Electrical Engineering MCQ Question Papers: Campus Placement

Subject: Analog and Digital Electronics 3

Part 3: List for questions and answers of Analog & Digital Electronics

 

Q1.Commutative property w.r.t addition is

a) x+y=y+x

b) x-y=y-x

c) x*y=y*x

d) (x+y)z=(z+y)x

 

Q2.NOR is a complement of

a) AND

b) OR

c) NOT

d) XOR

 

Q3.Inverter circuit inverts logic sense of

a) Division

b) Addition

c) Boolean variable

d) subtraction

 

Q4.X+x’ is equal to

a) 1

b) 0

c) x

d) x’

 

Q5.One that shows distributive law of addition over multiplication

a) x+(y.z)=(x.y)+(x.z)

b) x+(y.z)=(x+y).(x+z)

c) x+(y.z)=(x.y).(x+z)

d) x.(y+z)=(x+y).(x+z)

 

Q6.In equation a*b=c, * is the

a) Binary operator

b) Logical operator

c) Geometric operators

d) Linear operators 

 

Q7.Complement of function F is

a) 1

b) F’

c) F

d) 0

 

Q8.Binary operator + defines

a) Multiplication

b) Division

c) Addition

d) Subtraction

 

Q9.Demorgan law over addition is

a) (x.y)’=x’y’

b) (x+y)’=x+’y’

c) (x+y)’=x’y’

d) (x+y)’=x’

 

Q10.(x’)’ is

a) Complement

b) Dual complement

c) Duality

d) Reflection

 

Q11.Code conversion circuits mostly uses

a) AND-OR gates

b) AND gates

c) OR gates

d) XOR gates

 

Q12.3 bits full adder contains

a) 3 combinational inputs

b) 4 combinational inputs

c) 6 combinational inputs

d) 8 combinational inputs 

 

Q13.Nor function is dual of

a) AND function

b) OR function

c) XOR function

d) NAND function

 

Q14.Design procedure of combinational circuit involves

a) 4 steps

b) 5 steps

c) 6 steps

d) 8 steps

 

Q15.Simplified expression of half adder carry is

a) c=xy+x

b) c=y+x

c) c=xy+y

d) c=xy

 

Q16.Subtraction of two binary numbers is done by taking complementing

a) Output

b) Subtract or

c) Subtrahend

d) Remainder

 

Q17.Circuits that employs memory elements in addition to gates is called

a) Combinational circuit

b) Sequential circuit

c) Combinational sequence

d) Series

 

Q18.When both inputs are 1 output of xor is

a) 1

b) 0

c) x

d) 10

 

Q19.Simplified expression of full adder carry is

a) c=xy+xz+yz

b) c=xy+xz

c) c=xy+yz

d) c=x+y+z 

 

Q20.Practical design procedure have some

a) Gates

b) Circuits

c) Constraints

d) Protocols 

 

Part 3: List for questions and answers of Analog & Digital Electronics

 

Q1. Answer:a

 

Q2. Answer:b

 

Q3. Answer:c

 

Q4. Answer:a

 

Q5. Answer:b

 

Q6. Answer:a

 

Q7. Answer:b

 

Q8. Answer:d

 

Q9. Answer:

 

Q10. Answer:b

 

Q11. Answer:a

 

Q12. Answer:d

 

Q13. Answer:d

 

Q14. Answer:c

 

Q15. Answer:d

 

Q16. Answer:c

 

Q17. Answer:c

 

Q18. Answer:b

 

Q19. Answer:a

 

Q20. Answer: c