Computer Organization 5

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Electronic Engineering MCQ Question Papers: ENTC, IT Interview Placement

Subject: Computer Organization 5

Part 5: List for questions and answers of Computer Organization

 

Q1. During the execution of the instructions, a copy of the instructions is placed in the ______

a) Register

b) RAM

c) System heap

d) Cache

 

Q2. Two processors A and B have clock frequencies of 700 Mhz and 900 Mhz respectively. Suppose A can execute an instruction with an average of 3 steps and B can execute with an average of 5 steps. For the execution of the same instruction which processor is faster ?

a) A

b) B

c) Both take the same time

d) Insufficient information

 

Q3. A processor performing fetch or decoding of different instruction during the execution of another instruction is called ______

a) Super-scaling

b) Pipe-lining

c) Parallel Computation

d) None of these

 

Q4. For a given FINITE number of instructions to be executed, which architecture of the processor provides for a faster execution?

a) ISA

b) ANSA

c) Super-scalar

d) All of the above

 

Q5. The clock rate of the processor can be improved by,

a) Improving the IC technology of the logic circuits

b) Reducing the amount of processing done in one step

c) By using over clocking method

d) All of the above 

 

Q6. An optimizing Compiler does,

a) Better compilation of the given piece of code

b) Takes advantage of the type of processor and reduces its process time

c) Does better memory management

d) Both a and c

 

Q7. The ultimate goal of a compiler is to,

a) Reduce the clock cycles for a programming task

b) Reduce the size of the object code

c) Be versatile

d) Be able to detect even the smallest of errors

 

Q8. SPEC stands for,

a) Standard Performance Evaluation Code

b) System Processing Enhancing Code

c) System Performance Evaluation Corporation

d) Standard Processing Enhancement Corporation

 

Q9. As of 2000, the reference system to find the performance of a system is _____

a) Ultra SPARC 10

b) SUN SPARC

c) SUN II

d) None of these

 

Q10. When performing a looping operation, the instruction gets stored in the ______

a) Registers

b) Cache

c) System Heap

d) System stack

 

Q11. The average number of steps taken to execute the set of instructions can be made to be less than one by following _______

a) ISA

b) Pipe-lining

c) Super-scaling

d) Sequential 

 

Q12. If a processor clock is rated as 1250 million cycles per second, then its clock period is ________

a) 1.9 * 10^-10 sec

b) 1.6 * 10^-9 sec

c) 1.25 * 10^-10 sec

d) 8 * 10^-10 sec

 

Q13. If the instruction, Add R1,R2,R3 is executed in a system which is pipe-lined, then the value of S is (Where S is term of the Basic performance equation)

a) 3

b) ~2

c) ~1

d) 6

 

Q14. CISC stands for,

a) Complete Instruction Sequential Compilation

b) Computer Integrated Sequential Compiler

c) Complex Instruction Set Computer

d) Complex Instruction Sequential Compilation

 

Q15. As of 2000, the reference system to find the SPEC rating are built with _____ Processor

a) Intel Atom SParc 300Mhz

b) Ultra SPARC -IIi 300MHZ

c) Amd Neutrino series

d) ASUS A series 450 Mhz

 

Q16. Which register is memory pointer ?

a) Source index

b) Instruction register

c) Stack pointer

d) Program counter

 

Q17. In which of the following status flags required for data transfer are present ?

a) Interface Circuit

b) Parallel Line

c) Device Circuit

d) None of Above 

 

Q18. The main virtue for using single Bus structure is ,

a) Fast data transfers

b) Cost effective connectivity and speed

c) Cost effective connectivity and ease of attaching peripheral devices

d) None of these

 

Q19. ______ are used to overcome the difference in data transfer speeds of various devices

a) Speed enhancing circuitory

b) Bridge circuits

c) Multiple Buses

d) Buffer registers

 

Q20. To extend the connectivity of the processor bus we use ______

a) PCI bus

b) SCSI bus

c) Controllers

d) Multiple bus 

 

Part 5: List for questions and answers of Computer Organization

 

Q1. Answer: d

 

Q2. Answer: a

 

Q3. Answer: b

 

Q4. Answer: c

 

Q5. Answer: d

 

Q6. Answer: c

 

Q7. Answer: a

 

Q8. Answer: c

 

Q9. Answer: a

 

Q10. Answer: b

 

Q11. Answer: c

 

Q12. Answer: d

 

Q13. Answer: c

 

Q14. Answer: c

 

Q15. Answer: b

 

Q16. Answer: d

 

Q17. Answer: a

 

Q18. Answer: c

 

Q19. Answer: d

 

Q20. Answer: a