Computer Organization 6

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Electronic Engineering MCQ Question Papers: ENTC, IT Interview Placement

Subject: Computer Organization 6

Part 6: List for questions and answers of Computer Organization

 

Q1. ANSI stands for,

a) American National Standards Institute

b) American National Standard Interface

c) American Network Standard Interfacing

d) American Network Security Interrupt

 

Q2. _____ Register Connected to the Processor bus is a single-way transfer capable

a) PC

b) IR

c) Temp

d) Z

 

Q3. In multiple Bus organisation, the registers are collectively placed and referred as ______

a) Set registers

b) Register file

c) Register Block

d) Map registers

 

Q4. The main advantage of multiple bus organisations over single bus is,

a) Reduction in the number of cycles for execution

b) Increase in size of the registers

c) Better Connectivity

d) None of these

 

Q5. The ISA standard Buses are used to connect,

a) RAM and processor

b) GPU and processor

c) Hard disk and Processor

d) CD/DVD drives and Processor

 

Q6. The smallest entity of memory is called as _______

a) Cell

b) Block

c) Instance

d) Unit 

 

Q7. The collection of the above mentioned entities where data is stored is called as ______

a) Block

b) Set

c) Word

d) Byte

 

Q8. An 24 bit address generates an address space of ______ locations

a) 1024

b) 4096

c) 2 ^ 48

d) 16,777,216

 

Q9. If a system is 64 bit machine, then the length of each word will be ____

a) 4 bytes

b) 8 bytes

c) 16 bytes

d) 12 bytes

 

Q10. The type of memory assignment used in Intel processors is _____

a) Little

b) Big

c) Medium

d) None of the above

 

Q11. When using the Big Endian assignment to store a number, the sign bit of the number is stored in _____

a) The higher order byte of the word

b) The lower order byte of the word

c) Can’t say

d) None of the above

 

Q12. To get the physical address from the logical address generated by CPU we use ____

a) MAR

b) MMU

c) Overlays

d) TLB 

 

Q13. _____ method is used to map logical addresses of variable length onto physical memory

a) Paging

b) Overlays

c) Segmentation

d) Paging with segmentation

 

Q14. During transfer of data between the processor and memory we use ______

a) Cache

b) TLB

c) Buffers

d) Registers

 

Q15. Physical memory is divided into sets of finite size called as ______

a) Frames

b) Pages

c) Blocks

d) Vectors

 

Q16. The smallest entity of memory is called as _______

a) Cell

b) Block

c) Instance

d) Unit

 

Q17. The collection of the above mentioned entities where data is stored is called as ______

a) Block

b) Set

c) Word

d) Byte

 

Q18. An 24 bit address generates an address space of ______ locations

a) 1024

b) 4096

c) 2^48

d) 16,777,216 

 

Q19. If a system is 64 bit machine , then the length of each word will be ____

a) 4 bytes

b) 8 bytes

c) 16 bytes

d) 12 bytes

 

Q20. The type of memory assignment used in Intel processors is _____

a) Little Endian

b) Big Endian

c) Medium Endian

d) None of the above 

 

Part 6: List for questions and answers of Computer Organization

 

Q1. Answer: a

 

Q2. Answer: d

 

Q3. Answer: b

 

Q4. Answer: a

 

Q5. Answer: c

 

Q6. Answer: a

 

Q7. Answer: c

 

Q8. Answer: d

 

Q9. Answer: b

 

Q10. Answer: a

 

Q11. Answer: a

 

Q12. Answer: b

 

Q13. Answer: c

 

Q14. Answer: d

 

Q15. Answer: a

 

Q16. Answer: a

 

Q17. Answer: c

 

Q18. Answer: d

 

Q19. Answer: b

 

Q20. Answer: a