# Integrated Circuits 1

Electronic Engineering MCQ Question Papers: ENTC, IT Interview Placement

Subject: Integrated Circuits 1

Part 1: List for questions and answers of Integrated Circuits

Q1. Which among the following are regarded as three-pin voltage regulator ICs?

a) Fixed voltage regulators

c) Both a and b

d) None of the above

Q2. Due to operation of series pass transistor in an active region of linear voltage regulator,___________

a) The ripple contents in o/p voltage waveform is very low

b) Then there is no necessity of using high speed transistor

c) Both a and b

d) None of the above

Q3. Which type of IC voltage regulator exhibits continuous variation in the impedance of transistor in order to supply the desired load current?

a) Linear regulators

b) Switching regulators

c) Both a and b

d) None of the above

Q4. In LM317 voltage regulator, what is the minimum value of voltage required between its input and output in order to supply power to an internal circuit?

a) 1V

b) 3V

c) 5V

d) 10V

Q5. In LM317 voltage regulator, the protective diodes do not allow the filter capacitors to discharge through ______current points

a) High

b) Low

c) Both a and b

d) None of the above

Q6. In AM detector using PLL, the phase detector is basically a multiplier which produces ________components of frequencies at its output

a) Sum

b) Difference

c) Both a and b

d) None of the above

Q7. For a PLL IC 565 with timing resistor and timing capacitor of about 15 k? and 0.02?F respectively, what would be the value of output frequency (f0)?

a) 433.33 Hz

b) 833.33 Hz

c) 1000 Hz

d) 2500 Hz

Q8. In VCO IC 566, the value of charging and discharging is dependent on the voltage applied at ______

a) Triangular wave output

b) Square wave output

c) Modulating input

d) All of the above

Q9. According to transfer characteristics of PLL, the phase error between VCO output incoming signal must be maintained between _______ in order to maintain a lock

a) 0 and p

b) 0 and p/2

c) 0 and 2p

d)  p and 2p

Q10. Which characteristic of PLL is defined as the range of frequencies over which PLL can acquire lock with the input signal?

a) Free-running state

b) Pull-in time

c) Lock-in range

d) Capture range

Q11. In ADC 0809 acting as a CMOS device, how many analog inputs and channel multiplexers are present?

a) 2

b) 4

c) 8

d) 16

Q12. In ADCs, it is possible to reduce the quantization error by _______the number of bits

a) Increasing

b) Decreasing

c) Maintaining consistency in

d) All of the above

Q13. In dual slope type of ADCs, an input hold time is _______

a) Almost zero

b) Higher than that of flash type ADCs

c) Longest

d) All of the above

Q14. Which among the following types of ADCs require/s the shortest conversion time?

a) Flash type

b) Successive Approximation

c) Dual Slope

d) All of the above

Q15. In DACs, gain error occurs due to _________

a) offset voltages of op-amps

b) leakage current in the switches

c) error in feedback resistor value

d) error in current source resistance values

Q16. Among which of the following factors do/does the operation of sample and hold mode depend/s?

a) Input

b) Output

c) Position of switch

d) All of the above

Q17. In a peak detector circuit, which component holds the peak value till a higher peak value is detected?

a) Diode

b) Inductor

c) Capacitor

d) MOSFET switch

Q18. In hysteresis width, the hysteresis voltage is equal to _______ upper and lower threshold voltages (VUT and VLT)

a) sum of

b) difference between

c) product of

d) division of

Q19. In an inverting Schmitt Trigger circuit, the hysteresis ________ is also known as ‘hysteresis width’

a) voltage

b) current

c) resistance

d) power

Q20. Which among the following circuits is also regarded/known as ‘ Threshold Detector ‘?

a) Window detector

b) Over voltage indicator

c) Level detector

d) Zero crossing detector

Part 1: List for questions and answers of Integrated Circuits