Integrated Circuits 6

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Electronic Engineering MCQ Question Papers: ENTC, IT Interview Placement

Subject: Integrated Circuits 6

Part 6: List for questions and answers of Integrated Circuits


Q1. The active switching element used in all TTL circuits is the ________

a) bipolar junction transistor (BJT)

b) field-effect transistor (FET)

c) metal-oxide semiconductor field-effect transistor (MOSFET)

d) unijunction transistor (UJ)


Q2. An open-collector output requires ________

a) a pull-down resistor

b) a pull-up resistor

c) no output resistor

d) an output resistor


Q3. Most TTL logic used today is some form of ________

a) Schottky TTL

b) tristate TTL

c) low-power TTL

d) open-collector TTL


Q4. A standard TTL circuit with a totem-pole output can sink, in the LOW state (IOL(max)), ________

a) 16 mA

b) 20 mA

c) 16 A

d) 20 A


Q5. One output structure of a TTL gate is often referred to as a ________

a) totem-pole arrangement

b) diode arrangement

c) JBT arrangement

d) base, emitter, collector arrangement


Q6. It is best not to leave unused TTL inputs unconnected (open) because of TTL’s _______

a) noise sensitivity

b) low-current requirement

c) open-collector outputs

d) tristate construction 


Q7. Which is not an output state for tristate logic?


b) LOW

c) High-Z

d) Low-Z


Q8. TTL is alive and well, particularly in ________

a) industrial applications

b) educational applications

c) military applications

d) commercial applications


Q9. A TTL NAND gate with IIH(max) of 40 A per input drives ten TTL inputs. How much current does the drive output source?

a) 40 A

b) 200 A

c) 400 A

d) 800 A


Q10. A certain gate draws 1.8 A when its output is HIGH and 3.3 µA when its output is LOW. VCC is 5 V and the gate is operated on a 50% duty cycle. What is the average power dissipation (PD)?

a) 2.55 W

b) 1.27 W

c) 12.75 W

d) 5 W


Q11. PMOS and NMOS circuits are used largely in ________

a) MSI functions

b) LSI functions

c) diode functions

d) TTL functions


Q12. If ICCH is specified as 1.1 mA when VCC is 5 V and if the gate is in a static (noncharging) HIGH output state, the power dissipation (PD) of the gate is ________

a) 5.5 mW

b) 5.5 W

c) 5 mW

d) 1.1mW 


Q13. Which is not a precaution for handling CMOS?

a) Devices should be placed with pins down on a grounded surface, such as a metal plate

b) All tools, test equipment, and metal workbenches should be earth grounded

c) CMOS devices should not be inserted into sockets or PC boards with the power on

d) Wear wool clothes at all times


Q14. Which factor does not affect CMOS loading?

a) Charging time associated with the output resistance of the driving gate

b) Discharging time associated with the output resistance of the driving gate

c) Output capacitance of the load gates

d) Input capacitance of the load gates


Q15. Which is not part of emitter-coupled logic (ECL)?

a) Differential amplifier

b) Bias circuit

c) Emitter-follower circuit

d) Totem-pole circuit


Q16. Common emitter transistors are

a) NPN

b) PNP

c) RTL



Q17. Maximum no of inputs connected to gate is called

a) fan

b) fan in

c) fan out

d) out come


Q18. CMOS stands for

a) complementary material oxide semiconductor

b) complementary metal oxide semiconductor

c) complex metal oxide semiconductor

d) complex material oxide semiconductor 


Q19. Exceeding maximum load on circuit causes

a) malfunction

b) high performance

c) low performance

d) out come


Q20. Bipolar are constructed with

a) germanium

b) silicon

c) copper

d) both a and b 


Part 6: List for questions and answers of Integrated Circuits


Q1. Answer: a


Q2. Answer: b


Q3. Answer: a


Q4. Answer: a


Q5. Answer: a


Q6. Answer: a


Q7. Answer: d


Q8. Answer: b


Q9. Answer: c


Q10. Answer: c


Q11. Answer: b


Q12. Answer: a


Q13. Answer: d


Q14. Answer: c


Q15. Answer: d


Q16. Answer: a


Q17. Answer: c


Q18. Answer: b


Q19. Answer: a


Q20. Answer: d